Integrated circuits, including computer chips, are manufactured by building up layers of circuits on the front side of silicon wafers. An extremely high degree of wafer flatness and layer flatness is required during the manufacturing process. Chemical-mechanical planarization (CMP) is a process used during device manufacturing to flatten wafers and the layers built-up on wafers to the necessary degree of flatness.
Chemical-mechanical planarization is a process involving polishing of a wafer with a polishing pad combined with the chemical and physical action of a slurry pumped onto the pad. The wafer is held by a wafer carrier, with the backside of the wafer facing the wafer carrier and the front side of the wafer facing a polishing pad. The polishing pad is held on a platen, which is usually disposed beneath the wafer carrier. Both the wafer carrier and the platen are rotated so that the polishing pad polishes the front side of the wafer. A slurry of selected chemicals and abrasives is pumped onto the pad to affect the desired type and amount of polishing. (CMP is therefore achieved by a combination of chemical softener and physical downward force that removes material from the wafer or wafer layer.)
Using the CMP process, a thin layer of material is removed from the front side of the wafer or wafer layer. The layer may be a layer of oxide grown or deposited on the wafer or a layer of metal deposited on the wafer. The removal of the thin layer of material is accomplished so as to reduce surface variations on the wafer. Thus, the wafer and layers built-up on the wafer are very flat and/or uniform after the process is complete. Typically, more layers are added and the chemical mechanical planarization process is repeated to build complete integrated circuit chips on the wafer surface. Wafers are provided with flat edges or notches that are used to orient the wafers for various steps in the process. Wafers are provided in uniform sizes, including 150 mm wafers which have been available for some time and are typically flat edged (called flatted wafers), and newer 200 mm and 300 mm wafers which are round and notched (called round wafers or notched wafers).
In the process addressed by the devices and methods described below, a flat wafer is polished with a carrier with a retaining ring with an internal shape matching the flatted wafer. The retaining ring is slightly over-sized, compared to the wafer, to allow for enough room to automatically load the wafers into the carrier. The slight margin between the wafer and the retaining ring provides a small bit of room for the wafer to wobble relative to the ring, and this in turn leads to variance in the polishing rate a few millimeters from the flat edge vis-à-vis the remainder of the wafer. This is referred to as an edge effect.